The fetch-execute cycle is a process in computer architecture that describes how a CPU (Central Processing Unit) executes instructions in a computer program.
It ensures that instructions are fetched, decoded, and executed in the correct order, allowing the computer to perform a wide range of tasks and computations.
It consists of three primary steps, as follows:
Fetch
Decode
Execute
Fetch-Decode-Execute Cycle
Fetch
In the "fetch" phase, the CPU retrieves (or "fetches") the next instruction from memory. The CPU uses a special register called the Program Counter (PC) to keep track of the memory address of the next instruction to be executed. The PC is incremented to point to the next instruction after fetching.
The phase of the fetch-execute cycle involves retrieving the instruction from memory.
Fetch Stage Steps
The CPU uses the Program Counter (PC) to determine the memory address of the next instruction to be executed.
The CPU sends a request to the memory subsystem to access the memory location specified by the PC.
The memory subsystem retrieves the instruction stored at the memory address and sends it back to the CPU.
The fetched instruction is typically placed into a special register known as the Instruction Register (IR).
Finally, the PC is incremented to point to the next sequential memory address in preparation for the next fetch operation.
In the fetch phase, the program counter is incremented to point to the instruction.
Decode Phase
After the instruction is fetched and placed in the Instruction Register (IR), the CPU decodes the instruction. During the "decode" phase, the CPU interprets the instruction to determine what operation needs to be performed and which operands (data) are involved.
Which part of the CPU performs the instruction decode?
Decode Stage Steps
The CPU retrieves the instruction from the Instruction Register (IR), which was fetched in the previous fetch stage.
The CPU extracts the opcode (operation code) from the instruction, which specifies the type of operation to be performed.
The CPU identifies and extracts any operands or data values that the instruction operates on. This may involve interpreting memory addresses or immediate values encoded within the instruction.
Based on the extracted opcode and operand information, the CPU generates control signals that configure its internal components, such as the Arithmetic Logic Unit (ALU) and memory access pathways, for the upcoming operation.
The CPU checks whether the instruction is a branch instruction. If so, it calculates the target address for the branch and prepares to update the Program Counter (PC) accordingly to redirect program execution.
In some cases, the decode stage may include error checking to ensure that the instruction is well-formed and valid.
During the fetch-execute cycle, the control unit is responsible for the instruction.
Execute Phase
In the "execute" phase, the CPU carries out the operation specified by the decoded instruction. This could involve performing arithmetic or logical operations, accessing data from memory, controlling program flow, or interacting with input/output devices.
Which step of the fetch-execute cycle involves carrying out the instruction?
Execute Phase Steps
Retrieve the required operands for the operation, which may involve accessing memory, loading data from registers, or using immediate values.
Perform the specified arithmetic or logical operation using the fetched operands. This operation is typically executed by the Arithmetic Logic Unit (ALU).
Update registers, memory locations, or flags as necessary based on the outcome of the operation. This step may involve storing results, updating data, or setting condition flags.
If the instruction involves control flow changes, such as jumps, branches, or subroutine calls, modify the program's execution path by adjusting the Program Counter (PC) accordingly.
Implement error checking and handle exceptional conditions, such as detecting overflow, division by zero, or invalid memory accesses. Exception handling mechanisms may be triggered if errors occur.
Store the final result of the operation in the appropriate destination, which could be a register, memory location, or another storage medium.
Once the execute stage is finished, the CPU is ready to proceed to the next instruction in the fetch-decode-execute cycle. Update the Program Counter (PC) to point to the next sequential instruction in memory.
During the execute phase, the results of the ALU operations are stored in the .
